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Abstract
The Advanced Microcontroller Bus architecture is an open system-on-chip (SoC) protocol used by high-end devices to communicate with low-power devices. AMBA uses an advanced high-performance bus (AHB) to connect high-performance processors, DSPs, and memory controllers, and an advanced peripheral bus (APB) to connect low-bandwidth peripherals such as UARTs. There is also a bridge connecting the AHB and APB buses. A bridge is a standard interface that allows IP addresses connected to different buses to communicate with each other in a standard way. This paper represents the design and implementation of a Bridge that connects AHB and APB known as AHB2APB BRIDGE. The bridge is designed using Verilog HDL and implemented using XILINX ISE tool.
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Conflict of Interest
The authors declare no conflict of interest.
Ethical Approval
Not applicable
Data Availability
The datasets used in this study are openly available at [repository link] and the source code is available on GitHub at [GitHub link].
Funding
This work did not receive any external funding.
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